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| STM6317ATXXZ资料 | |
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STM6317ATXXZ PDF Download |
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File Size : 116 KB
Manufacturer:ST Description:When High, this input holds the address counter reset and 3-states the DATA output. The polarity of this input pin is programmable as either RESET/OE or OE/RESET. To avoid confusion, this document describes the pin as RESET/OE, although the opposite polarity is possible on all devices. When RESET is active, the address counter is held at zero, and the DATA output is put in a high-impedance state. The polarity of this input is programmable. The default is active High RESET, but the preferred option is active Low RESET, because it can be driven by the FPGAs INIT pin. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：STM6317ATXXZ 厂 家：ST 封 装：QFP-100 批 号：09+ 数 量：30000 说 明：全新原装正品现货，专业供应 |
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