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SN74LVC08ARGYR资料 | |
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SN74LVC08ARGYR PDF Download |
File Size : 116 KB
Manufacturer:TI Description:When the FPGA is in Express or SelectMAP Mode, an external oscillator will generate the configuration clock that drives the PROM and the FPGA. After the rising CCLK edge, data are available on the PROMs DATA (D0-D7) pins. The data will be clocked into the FPGA on the follow- ing rising edge of the CCLK. Neither Express nor Select- MAP utilize a Length Count, so a free-running oscillator may be used. See Figure 5 |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:SN74LVC08ARGYR 厂 家:TI 封 装:QFN14 批 号:09+ 数 量:30000 说 明:全新原装正品现货,专业供应 |
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