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IPD350N06LG

IPD350N06LG资料
IPD350N06LG
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File Size : 116 KB
Manufacturer:INF
Description: Supports Provisions of IEEE 1394-1995 Standard for High Performance Serial Bus and the P1394a  Supplement 2.0. Full P1394a Supplement Support includes:  n Arbitrated short reset,  n Connection Debounce,  n Multispeed Concatenation,  n Ack Accelerated Arbitration,  n Fly-By Concatenation,  n Programmable Port Disable, Suspend, Resume,  n PHY IDs Do Not Increment Past 63  Provides Four 1394a Fully Compliant Cable Ports at 100/200/400 Megabits per Second (Mbit/s) Single 3.3 V power supply Logic Performs Bus Initialization and Arbitration Functions Encode and Decode Functions Included for Data-Strobe Bit-Level Encoding Incoming Data Resynchronized to Local Clock. Data Interface to Link-Layer Controller Provided Through 2/4/8 Parallel Lines at 49.152 MHz 24.576 MHZ Crystal Oscillator and PLL Provide TX/RX Data at 100/200/400 Mbps and Link-Layer  Controller Clock at 49.152 MHZ. Cable Power Presence Monitoring. Programable Node Power Class Information for System Power Management Embedded Bus Holder Isolation to Link Layer Controller Interface Optional On-chip Resistors to Reduce Component Counts for Electrical Isolation to Link Layer  Controller Interface Fully Compliant P1394a 2.0 PHY Map Separate TPBIAS for Each Port Fully Interoperable with IEEE Std1394-1995 Devices Cable Ports Monitor Line Conditions for Active Connection to Remote Node  Low Power Design for Battery-Powered Applications includes: User Controlled Power-Down via PD,  Automatic Device Power-Down during All Ports Suspended and Link Interface Disabled, Link  Interface Power-Down via Inactive LPS, Automatic Inactive Ports Powered-Down, and Automatic  Inactive Logic Power-Down  Self Power Up Reset and Pinless PLL to Reduce Component Counts on System  Low Cost 100-Pin PQFP package
 
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型 号:IPD350N06LG
厂 家:INF
封 装:2009+
批 号:200000
数 量:TO-252
说 明:全新原装现货特价供应 欢迎来电查询
 
 
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