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| EPM7128AETI100-5资料 | |
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EPM7128AETI100-5 PDF Download |
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File Size : 116 KB
Manufacturer:ALTERA Description: Program Erase Enable input VPEN, program or erase operations are not possible when the Program Erase Enable input VPEN is low. 128 bit Protection Register, divided into two 64 bit segments: the first contains a unique device number written by ST, the second is user programmable. The user programmable segment can be protected. The Reset/Power-Down pin is used to apply a Hardware Reset to the enabled memory and to set the device in power-down mode. The device features an Auto Low Power mode. If the bus becomes inactive during read operations, the device automatically enters Auto Low Power mode. In this mode the power consumption is re- duced to the Auto Low Power supply current. The STS signal is an open drain output that can be used to identify the Program/Erase Controller sta- tus. It can be configured in two modes: Ready/ Busy mode where a static signal indicates the sta- tus of the P/E.C, and Status mode where a pulsing signal indicates the end of a Program or Block Erase operation. In Status mode it can be used as a system interrupt signal, useful for saving CPU time. The memory is available in TSOP56 (14 x 20 mm) and TBGA64 (10x13mm, 1mm pitch) packages. In addition to the standard version, the packages are also available in Lead-free version, in compli- ance with JEDEC Std J-STD-020B, the ST ECO- PACK 7191395 Specification, and the RoHS (Restriction of Hazardous Substances) directive. All packages are compliant with Lead-free solder- ing processes. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：EPM7128AETI100-5 厂 家：ALTERA 封 装：QFP 批 号：09+ 数 量：5000 说 明：绝对全新原装正品现货，欢迎新老客户来电！！ |
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