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| EPM7064STC100-5资料 | |
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EPM7064STC100-5 PDF Download |
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File Size : 116 KB
Manufacturer:ALTERA Description:1. Place series resistors and CI capacitors as close as possible to the respective clock pins. Typical value for CI is 10pF. Series resistor value can be increased to reduce EMI provided that the rise and fall time are still within the specified values. 2. Minimize the number of “vias” of the clock traces. 3. Route clock traces over a continuous ground plane or over a continuous power plane. Avoid routing clock traces from plane to plane (refer to rule #2). 4. Position clock signals away from signals that go to any cables or any external connectors. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：EPM7064STC100-5 厂 家：ALTERA 封 装：QFP 批 号：09+ 数 量：6000 说 明：★全新原装正品现货，价格优势★ |
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