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| AZ431AN-ATRE1资料 | |
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AZ431AN-ATRE1 PDF Download |
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File Size : 116 KB
Manufacturer:AAC Description:Pixel Clock Input To operate in a pure master mode, the P-OUT signal should be connected to the XCLK input pin. To operate in a pseudo-master mode, the P-OUT clock is used as a reference frequency, and a signal locked to this output (at 1X, 1/2X, or 1/3X the P-OUT frequency) is input to the XCLK pin. To operate in slave mode, the CH7006 accepts an external pixel clock input at this pin. The capacitive loading on this pin should be kept to a minimum. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：AZ431AN-ATRE1 厂 家：AAC 封 装：SOT-23 批 号：05+ 数 量：9000 说 明：绝对全新原装大量现货，质量保证，欢迎来电查询 |
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运 费： 所在地： 新旧程度： |
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| 联系人：李利媛 |
| 电 话：0755/83019596,83247541,83247486 |
| 手 机：13480648723 |
| QQ：1104562168,1178139673,1113496577,2881934444,2881943289,2881943290 |
| MSN：ao-liteng01@hotmail.com,ao-liteng02@hotmail.com,ao-liteng03@hotmail.com,ao-liteng04@hotmail.com |
| 传 真：0755-83016216 |
| EMail：aoliteng1@163.com |
| 公司地址： 广东省深圳市福田区振兴西路新欣大厦B座518室 |
