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| 74LVC1G00GM资料 | |
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74LVC1G00GM PDF Download |
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File Size : 116 KB
Manufacturer:Philips Description:A LOW on this pin initializes the FIFO read and write pointers to the first location of memory and sets the Port B output register to all zeroes. During Partial Reset, the currently selected bus size, endian arrangement, programming method (serial or parallel), and programmable flag settings are all retained. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：74LVC1G00GM 厂 家：Philips 封 装：XSON6 批 号：09+ 数 量：50000 说 明：绝对全新原装大量现货，欢迎来电查询 |
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