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| 74HC04D资料 | |
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74HC04D PDF Download |
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File Size : 116 KB
Manufacturer:PHI Description:The K7N803645B and K7N801845B are 9,437,184 bits Syn- chronous Static SRAMs. The NtRAMTM, or No Turnaround Random Access Memory utilizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock. Burst order control must be tied "High or Low". Asynchronous inputs include the sleep mode enable(ZZ). Output Enable controls the outputs at any given time. Write cycles are internally self-timed and initiated by the rising edge of the clock input. This feature eliminates complex off- chip write pulse generation and provides increased timing flexibility for incoming signals. For read cycles, pipelined SRAM output data is temporarily stored by an edge triggered output register and then released to the output buffers at the next rising edge of clock. The K7N803645B and K7N801845B are implemented with SAMSUNGs high performance CMOS technology and is available in 100pin TQFP and Multiple power and ground pins minimize ground bounce. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：74HC04D 厂 家：PHI 封 装：SOP 批 号：09+ 数 量：30000 说 明：全新原装正品现货，专业供应 |
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运 费： 所在地： 新旧程度： |
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| 联系人：李利媛 |
| 电 话：0755/83019596,83247541,83247486 |
| 手 机：13480648723 |
| QQ：1104562168,1178139673,1113496577,2881934444,2881943289,2881943290 |
| MSN：ao-liteng01@hotmail.com,ao-liteng02@hotmail.com,ao-liteng03@hotmail.com,ao-liteng04@hotmail.com |
| 传 真：0755-83016216 |
| EMail：aoliteng1@163.com |
| 公司地址： 广东省深圳市福田区振兴西路新欣大厦B座518室 |
技术支持:维库电子市场网