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| 215W2250AFAT2资料 | |
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215W2250AFAT2 PDF Download |
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File Size : 116 KB
Manufacturer:ATI Description:Transmit Clock Tri-statable. This signal is used in synchronous DPSK/QAM transmission to latch serial input data on the TXD pin. Data must be provided so that valid data is available on the rising edge of the TXCLK. The transmit clock is derived from different sources depending upon the Synchronization mode selection. In Internal Mode the clock is generated internally (2400 Hz for QAM, 1200 Hz for DPSK or 600 Hz for half-speed DPSK). In External Mode TXCLK is phase locked to the EXCLK pin. In Slave Mode TXCLK is phase locked to the RXCLK pin. TXCLK is always active. In V.23 or V.21 mode the output is a 16 x 1200/75 or 16 x 300 Hz clock, respectively. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：215W2250AFAT2 厂 家：ATI 封 装：BGA 批 号：09+ 数 量：30000 说 明：全新原装正品现货，专业供应 |
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